In general, a microcomputer employs a microprocessor as a CPU for processing data and controlling the microcomputer, an input/output device for input/output of data, and a memory for storing programs and data. Thus, a single chip microcomputer, or microcomputer unit (MCU), is a computer in which the microcomputer is integrated onto a single chip.
A conventional device for generating an interrupt will be explained with reference to the attached drawings. FIG. 1 illustrates a block diagram of the conventional device for generating an interrupt.
Referring to FIG. 1, the conventional device for generating an interrupt includes: a plurality of interrupt enabling parts 1 (e.g., each represented by a bit of a register, respectively); a plurality of interrupt demanding signal generating parts 2; an interrupt priority determining part 3 (including a register having one bit for each generating part 2); a bus 4; and an MCU 5. Interrupt sources include such things as a timer, a keyboard controller, a clock, a mouse, a math coprocessor, a disk drive and a communication part.
An interrupt enabling part 1 acts as a switch by which a corresponding interrupt demanding signal generator part can be turned ON/OFF by the MCU 5. For example, the enabling part 1 controllably blocks/passes the signal generated by the generating part 2. Each of the interrupt enabling parts 1 enables operation of the corresponding generating part 2 according to whether a bit is set or not in the enabling part 1 by the MCU 5.
Each of the interrupt demanding signal generating parts 2 (if enabled by the corresponding enabling part 1), upon reception of a signal from an interrupt source, generates an interrupt demanding signal and applies it to the MCU, and sets interrupt generating information bits corresponding to the interrupt source. When an interrupt demand, which is an interrupt demanding signal applied from a certain peripheral device to the CPU (i.e., the MCU) is generated, the MCU determines (by way of the interrupt priority determining part 3) whether the interrupt demand should be processed according to an interrupt priority or neglected. If an interrupt has been permitted, an interrupt response(or permission signal) is given to the peripheral device, according to which the peripheral device issues an interrupt signal. The interrupt priority determining part 3 receives a plurality of signals from the interrupt demanding signal parts 2 for use in determining priorities of the interrupt signals. That is, when the MCU has set a particular interrupt enabling part 1 according to a program, the correspondingly-enabled interrupt demanding signal generating part 2 applies its interrupt demanding signal to the interrupt priority determining part 3, thereby an interrupt of high priority is recognized and selected.
The operation of the conventional device for generating an interrupt having the aforementioned system will be explained.
Referring to FIG. 1, upon reception of signals from a plurality of interrupt sources, each of the interrupt demanding signal generating parts 2, if enabled, sets its corresponding bit in the register of the priority determining part 3, thereby ultimately causing an interrupt demanding signal to be sent to the MCU. Upon reception of a plurality of interrupt signals from the interrupt demanding signal generating parts 2, i.e., having the corresponding bits set in its register, the interrupt priority determining part 3 generates a final interrupt signal to the MCU corresponding to the relatively highest priority interrupt source after having organized the bits set in its register, i.e., the interrupt demanding signals that the priority determining part 3 has received, according to a predetermined hierarchy.
However, the generating parts 2 cannot discriminate between noise on the line and a real signal from the interrupt source. Where a bit set by noise has a higher priority than a bit set by a real interrupt, the priority determining part will select the noise over the real signal. Consequently, the conventional device for generating an interrupt cannot avoid issuing a false interrupt corresponding to noise, because the device cannot discriminate noise from real interrupt signals.